1. Field of the Invention
The present invention is situated in the field of design environments for digital systems, generating implementable descriptions of said system. The invention is based on object modeling and mechanisms to refine abstract descriptions to more concrete description of the system.
2. State of the Art
Currently there is a high interest in digital communication equipment for public access networks. Examples are modems for Asymmetric Digital Subscriber Loop (ADSL) applications, and up- and downstream Hybrid Fiber-Coax (HFC) communication. These modems are preferably implemented in all-digital hardware using digital signal processing (DSP) techniques. This is because of the complexity of the data processing that they require. Besides this, these systems also need short development cycles. This calls for a design methodology that starts at high level and that provides for design automation as much as possible. A more generalized view of the field of the invention reveals that in most applications where dedicated processors and other digital hardware are used, demand for new systems is rising and development time is shortening.
The most used modeling description language is VHDL (VHSIC Hardware Description Language), which has been accepted as an IEEE standard since 1987. VHDL is a programming environment that produces a description of a piece of hardware. Additions to standard VHDL can be to implement features of Object Oriented Programming Languages into VHDL. This was described in OO-VHDL (Computer, October 1995, pages 18-26).
A number of commercially available systems support the design of complex DSP systems.
MATLAB of Mathworks Inc offers the possibility of exploration at the algorithmic level. It uses the data-vector as the basic semantical feature. However, the developed MATLAB description has no relationship to a digital hardware implementation, nor does MATLAB support the synthesis of digital circuits.
SPW of Alta Group offers a toolkit for the simulation of these kind of systems. SPW is typically used to simulate data-flow semantics. Data-flow semantics define explicit algorithmic iteration, whereas data-vector semantics do not. SPW relies on an extensive library and toolkit to develop systems. Unlike MATLAB, the initial description is a block-based description. Each block used in the systems appears in two different formats, (a simulatable and a synthesizable version) which results in possible inconsistency.
COSSAP of Synopsys performs the same kind of system exploration as SPW.
DC and BC are products of Synopsys that support system synthesis. These products do not provide sufficient algorithm exploration functions.
Because all of these tools support only part of the desired functionality, contemporary systems are designed typically with a mix of these environments. For example, a designer might do algorithmic exploration in MATLAB, then do architecture definition with SPW, and finally map the architecture definition to an implementation in DC.
One primary aim of the invention is a design environment that makes it possible to design a digital systems from a data vector description to an implementable level such a VHDL. A further aim is to perform this design within the same object oriented environment. Another aim is to provide a means comprised in said design environment for simulating behaviour at any level of development.